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Signal Processing Engineer (RF Processing & Analytics)

FPGA Engineer - Electronic Warfare

location_on Paris
schedule Posted 1 day ago
work Full Time
public Source: Arbeitnow

About the Role

About Us

Harmattan AI is a next-generation defense prime building autonomous and scalable defense systems. Following the close of a $200M Series B, valuing the company at $1.4 billion, we are expanding our teams and capabilities to deliver mission-critical systems to allied forces.

Our work is guided by clear values: building technologies with real-world impact, pursuing excellence in everything we do, setting ambitious goals, and taking on the hardest technical challenges. We operate in a demanding environment where rigor, ownership, and execution are expected.

About the Role

As an FPGA Engineer within our Electronic Warfare team, you will design and implement the real-time digital signal processing that turns raw RF into actionable effect — from receiver channelization and threat detection through to jamming waveform generation. You will own the RTL at the heart of our EW and SIGINT systems, working hand-in-hand with the RF hardware, embedded software and algorithm teams to take a signal chain from concept and simulation to silicon, to the lab, and into the field.

Responsibilities

•
RTL Design & Implementation: Design and implement signal-processing datapaths in VHDL or SystemVerilog — digital down-conversion, channelizers, filtering, FFT and detection chains — from specification through to validation.

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Real-Time DSP in Fabric: Implement detection, direction-finding, classification and waveform generation under hard latency and throughput budgets, translating algorithm intent into fixed-point hardware.

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RF & Data Converter Interfacing: Own the digital interface to the RF front-end — high-speed converters (JESD204B/C), multi-channel clocking, synchronization and calibration paths.

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Hardware/Software Partitioning: Define the split between programmable logic and on-chip processors, and the register and streaming interfaces the embedded software team builds against.

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Timing Closure & Resource Budgets: Drive constraints, timing closure, and resource, power and thermal budgets on production hardware.

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Bring-up, Integration & Validation: Lead FPGA bring-up on new boards, bench validation against performance targets with RF instrumentation, and over-the-air testing alongside the systems team.

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Technical Coordination: Collaborate across RF hardware, embedded, GNC and ML teams on system integration and technical interfaces.

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System Reviews & Documentation: Contribute to design and architecture reviews, maintaining consistency between requirements, design and testing.

Candidate Requirements

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Strong RTL design background in VHDL or SystemVerilog for signal-processing datapaths is mandatory.

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Solid digital signal processing fundamentals: sampling, mixing, decimation, filter design, FFT, and fixed-point arithmetic and quantization trade-offs.

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Hands-on experience with SoC FPGAs and their toolchains..

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No prior Electronic Warfare experience required.

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Experience with high-speed data converter interfaces (JESD204B/C) and multi-channel synchronization is a definite plus.

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Experience with algorithm-to-RTL workflows (MATLAB/Simulink, Python modelling, or HLS) is a plus.

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Lab experience with RF instrumentation — spectrum analyzer, vector signal generator, oscilloscope — is a plus.

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MSc in Electrical / Electronics Engineering, Signal Processing or a related field;

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Broad engineering culture with understanding of RF hardware, embedded software and system-level trade-offs.

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Rigorous, structured and mission-driven mindset with strong analytical skills.

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Excellent communication and documentation abilities.

We look forward to hearing how you can help shape the future of autonomous defense systems at Harmattan AI.

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Requirements

Qualifications

  • Experience: Fresher

Skills & Languages

Analytical Skills Technical AI Electronics Engineering Engineer Hardware RTL Design FPGA Execution Environment Processing Generation

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payments Estimated Market Compensation

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₹25,000 – ₹55,000 / year

Market Median: ₹34,500. Range reflects the 25th to 75th percentile of similar active roles on Jobsfiy.

speed Category Snapshot: R&D

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101+

Remote Flexibility

2% Remote

Target Experience

Senior

Education Details

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Minimum Education

Master Degree

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Accepted Degrees

MSc

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